Phoebe 2100: The Kernel

RISC OS 4 has undergone some important changes. Unfortunately, these mean that the new version is specific to Phoebe, and will not be available for older machines.
There are two main enhancements to RISC OS 4's Kernel: task swapping has been improved, and 32 bit user code is now supported.

The responsibility for Task Swapping has been moved from the Window Manager into the Kernel.
A new algorithm has been implemented, known as Lazy Task Swapping. This improves the speed of context switching by only loading memory pages when they are required.
The old method of context switching hit the StrongARM's cache hard. Every time a new application was paged in, the cache had to be flushed and then reloaded from the new task's memory area. The Lazy algorithm helps to avoid this.

In addition, the Kernel now fully supports 32 bit code.
RISC OS is fundamentally a 26 bit system, a hang-over from the old ARM processors. Code running in Fast IRQ or Supervisor modes can be 32 bit at the moment, but this is not recommended.
Two new SWIs have been added to RISC OS 4 to allow user code to execute in the 32 bit mode (for example, SVC32 from the ARM Architecture v4).
One of the prime motivations for this change is that it allows the Floating-Point Emulator (FPE) to be rewritten to fully exploit the StrongARM.
The new FPE will make full use of the StrongARM's 32 bit instructions, such as the 32 bit by 32 bit multiply. This is likely to significantly improve the FPE's performance: for example, a long multiply originally took 2 to 16 clock cycles; in 32 bit mode, it will take 2 to 3 cycles.
A further advantage is that the 32 bit code will run from within a Dynamic Area, offering a better memory protection model.